1. Field of the Invention
The present invention relates to a programmable switch device, and more specifically, to a nonvolatile programmable switch device using a phase-change random access memory device (PRAM) and a method of manufacturing the same.
2. Discussion of Related Art
Recent trends in technical developments of the electronics industry can be summarized as follows:
First, set application devices have become highly functional centering on portable devices and digital household electrical appliances, and digital components for mounting multimedia contents have been developed.
Second, with integration of discrete technical fields, such as broadcasting, communications, and computers, electronic components have shown a growing tendency to shrink to single chips.
Third, owing to consumers' specific and diversified demands, the lifespans of components have become shortened and a wide variety of components have been increasingly produced in small quantities.
The trends in the developments of the electronics industry are being realized by active research on reconfigurable large-scale integrations (LSIs) in which circuits are capable of being partially reconfigured at users' requests to fulfill various functions, instead of manufacturing new semiconductor chips separately to meet various functions and demands.
A field programmable gate array (FPGA), which is a typical conventional reconfigurable LSI, may include a programmable switch matrix for partially reconfiguring an LSI circuit, and a unit switch device constituting the programmable switch matrix may include a static random access memory (SRAM) (or a flip-flop) and a pass-gate. However, the FPGA may have the following problems:
First, since the FPGA occupies a large chip area, its fabrication would be costly. Second, a high resistance of a transistor switch device as well as an increase in a parasitic element due to an increase in the length of interconnection lines caused by the large chip area may lead to a reduction in operating speed. Third, the area of the switch matrix is much larger than that of a logic LSI circuit and thus configuration of the logic LSI circuit may be inefficient and its parallel computing capability may be degraded. Fourth, since a switch uses a volatile memory, it is highly likely to lose data during power interruption. As a result, the logic LSI circuit requires an additional external memory.
In order to solve the above-described problems, it is necessary to develop a new programmable switch device.
A switch device for a reconfigurable LSI requires the following important capabilities.
First, the switch device should have the lowest possible on-state resistance. A high on-state resistance of the switch device may bring about a considerable voltage drop in each switch device during the drive of a switch matrix, thereby hindering the drive of the entire matrix. In addition, a marked signal delay may occur due to the high on-state resistance of the switch device. Although a conventional switch device composed of an SRAM and a pass-gate has an on-state resistance of several kΩ or less, it is necessary to reduce the on-state resistance of the switch device by about one tenth.
Second, the switch device should have a small cell area. As stated above, a conventional reconfigurable LSI includes a switch matrix with a much larger area than that of a logic circuit, thereby greatly lowering configuration efficiency of the entire LSI. In this case, the introduction of a new small-sized switch device may lead not only to a reduction in the cell area of the switch device but also to an increase in an area occupied by a logic circuit in the entire reconfigurable LSI, thereby improving the performance of the entire LSI. In other words, a reduction in a distance between logic circuit regions may result in the reduction of a parasitic element caused in interconnections, thereby lessening the operation delay time of the entire LSI.
Third, the switch device should have nonvolatile characteristics. Since a conventional switch device comprised of an SRAM and a pass-gate loses stored data during power interruption, an additional nonvolatile memory should be installed outside an LSI in order to prevent data loss. However, this may lead to the following two problems: First, the installation of the additional nonvolatile memory outside the LSI may cause an increase in the area of the entire LSI and a rise in an operating voltage. Second, since the external nonvolatile memory is highly likely to lose data through illegal access, the security of a reconfigurable LSI mainly used during development of new products may greatly deteriorate. Therefore, a switch matrix including a nonvolatile switch device may be embedded in a reconfigurable LSI.
Fourth, the switch device should be capable of operating at a low voltage. In recent years, reconfigurable LSIs including nonvolatile switch matrixes using flash memories as switch devices have been introduced. However, the reconfigurable LSIs require additional internal voltage boost circuits because the flash memories basically operate at high voltages. Accordingly, it is necessary to develop a low-voltage nonvolatile programmable switch device.
Fifth, the switch device should have sufficient reliability against repeated write operations. Although a conventional switch device composed of an SRAM and a pass-gate has no restrictions on repeated write operations, nonvolatile memory operations cannot be expected from the conventional switch device because the switch device is originally a volatile device. Also, the number of times the above-described flash-memory switch device is capable of repeating a write operation is limited to 105 times. Accordingly, it is necessary to introduce a new switch device with better repeated write characteristics.
Sixth, a nonvolatile programmable switch device should be capable of retaining stored data for a long time. In other words, the nonvolatile programmable switch device should have long-term data retention. In general, a memory device requires a data retention characteristic, which determines the operating reliability of a nonvolatile memory device. Even a nonvolatile programmable switch device mounted on a reconfigurable LSI should have data retention. Unlike a typical memory device, since the nonvolatile programmable switch device is mounted in an LSI circuit, it is mostly employed with application of a voltage bias under certain conditions. Accordingly, the switch device for the reconfigurable LSI requires high data retention so that stored data can be stably retained even with application of a bias under actual conditions.
One of the strongest candidates for a technique capable of embodying a nonvolatile programmable nano-switch device for a reconfigurable LSI that solves the above-described technical problems is to adopt a nonvolatile phase-change random access memory device (PRAM) as a switch device.
The PRAM is fabricated using a phase-change material whose resistance varies according to its crystalline phase. In order to enable a memory operation, the PRAM controls the crystalline state of the phase-change material with application of current or voltage under appropriate conditions to store data, and determines the kind of the stored data based on a variation in resistance according to the crystalline state of the phase-change material. The phase-change material has a low resistance in a crystalline phase and a high resistance in an amorphous phase. By use of the above-described characteristics, the PRAM may not only function as a nonvolatile memory but also be effectively switched between low and high resistance states.
Meanwhile, a chalcogenide metal alloy, particularly, Ge2Sb2Te5(GST)—obtained by combining germanium(Ge), antimony(Sb), and tellurium(Te) with a composition ratio of 2:2:5—has been employed as a phase-change material layer of a PRAM. Since the GST has been widely used as an essential material for an optical storage medium using phase change due to laser beams, its physical properties are well known. Above all, the GST with a composition ratio of 2:2:5 is widely used for optical storage media because it can be reversibly switched between an amorphous phase and a crystalline phase and crystallized quickly and is highly capable of continuously changing its phase. These characteristics are still advantageous in application to phase-change semiconductor memory devices. Accordingly, it is understood that the GST with the above-described composition may be easily applied to PRAMs and actually used for most practically useful PRAMs.
Also, since a manufacturing process of PRAMs is highly compatible with conventional processes of manufacturing silicon-based devices, the PRAMs can be as highly integrated as DRAMs. By comparison, in the case of magneto-resistive random access memories (MRAMs) and ferroelectric random access memories (FRAMs) that compete with the PRAMs, with the miniaturization of devices, the difficulty of processes may sharply increase and the performance of the devices may deteriorate. Accordingly, judging from the present state of technical developments, a PRAM is the strongest candidate for an advanced nonvolatile memory that can replace conventional flash memories and has attracted much attention for that reason.
When the above-described PRAM is used as a nonvolatile programmable switch device, the following technical merits can be obtained:
First, a PRAM has an on-state resistance of several hundred Ω, which is only a tenth of that of a conventional switch device comprised of an SRAM and a pass-gate.
Second, on the basis of the minimum circuit design unit F that is mainly used to indicate the area of a device, since the cell area of a switch device including a PRAM is 8F2 or less, and that of a conventional switch device comprised of an SRAM and a pass-gate is 120F2, the cell area can be reduced to 1/15 that of the conventional switch device.
Third, as mentioned above, a PRAM may function as a nonvolatile memory and be embedded in a switch matrix for a reconfigurable LSI so that an additional external read-only memory (ROM) is not required.
Fourth, when a PRAM is installed in a switch matrix for a reconfigurable LSI, a switch device can operate at a low voltage so that it does not require a voltage boost circuit as does a nonvolatile FPGA and can have better repeated write characteristics than a flash memory.
Fifth, considering its operating principles, a PRAM may easily control a threshold voltage required for an operation according to the kind of a material and the structure of the device so that it can easily retain stored data even with long-term application of a specific bias voltage.
However, in order to obtain the above-described merits, solutions to the following technical issues need to be furnished:
First, power consumption required for driving a programmable switch device including a PRAM should be further reduced.
When a nonvolatile programmable switch includes a PRAM, the PRAM is introduced in an LSI circuit having a common CMOS device. In this case, it is necessary to reduce the operating current of the PRAM in order to normally operate the PRAM.
Second, it is necessary to ensure compatibility and process simplicity when a programmable switch device having a PRAM is integrated with an LSI.
Third, the operating reliability of a programmable switch device including a PRAM needs to be ensured.
When a nonvolatile programmable switch device employs a PRAM, the operating reliability of the PRAM as a memory device and the operating reliability of the programmable switch device in logic and system LSIs should be considered simultaneously. This makes a big difference from a case in which the PRAM serves only as a memory device. Accordingly, in order to solve this technical issue, it is very important to understand the necessity of a PRAM with a new structure. In general, the operating reliability of the PRAM should satisfy the following two operating conditions:
First, even if a PRAM repeats a write operation, data should be stably stored. In other words, the PRAM must have repeated write characteristics so that it can repeat set and reset operations to erase stored data and rewrite new data. Although the number of times a PRAM is capable of repeating a write operation is known to be about 108 times, this is optimum data obtained using a test device fabricated under the optimum conditions. Considering deviation in the characteristics of individual memory devices constituting an actual memory array, the number of times a PRAM is actually capable of repeating a write operation is estimated to be about 105 to 107 times. Meanwhile, when a nonvolatile programmable switch device includes a PRAM, a required number of times the PRAM is capable of repeating a write operation may depend on the purpose of the programmable switch device.
Second, after data is written in a PRAM, it should be retained as is over time in the operating environment of the PRAM. In other words, set or reset data written in the PRAM should be maintained for a long period of time, even in the high-temperature conditions under which a chip including a memory array actually operates. When discussing nonvolatile memory characteristics, this requirement is mainly considered as a data retention characteristic. Meanwhile, in the case of a PRAM, the crystalline state of a predetermined phase-change material is changed due to thermal energy applied thereto and thus, the PRAM uses a variation in an electrical resistance of the material due to the change in the crystalline state of the material. Therefore, it is necessary to improve the kind of phase-change material and the structure of a PRAM in order to increase the data retention of the PRAM.
A switch device is highly likely to frequently lose stored data during the transition from a high-resistance state to a low-resistance state. This is because a set operation, which is performed during the transition from the high-resistance state to the low-resistance state, requires a lower operating voltage than a reset operation.
As described above, power consumption required for operating a programmable switch device including a PRAM should be further reduced. However, when a PRAM is used as a nonvolatile programmable switch device, a reduction in the power consumption required for a program operation of the PRAM means that data stored in the switch device can be lost more easily due to electrical signals applied to both terminals of the switch device in an LSI circuit. Thus, there is a trade-off relationship between a reduction in the operating current of a programmable switch device and an increase in operating reliability against a voltage bias stress at both terminals of the switch device. Accordingly, it is very difficult to achieve both objects using a conventional two-terminal device structure. This is an essential technical issue to face when a nonvolatile programmable switch device is embodied using a PRAM.
In order to embody a compact, high-performance, high-reliability nonvolatile programmable switch device for a reconfigurable LSI or a system LSI, it is necessary to utilize the merits of a nonvolatile programmable switch device using a PRAM and effectively overcome conventional technical problems based on the above discussions. Therefore, the structure and manufacture of the nonvolatile programmable switch device should satisfy the following two necessary and sufficient conditions:
First, an operating region of a PRAM functioning as a nonvolatile programmable switch device should be shrunk to the nanometer scale, which is compatible with conventional scaling rules, while simplifying the structure of the PRAM and minimizing the introduction of additional processes. According to methods of scaling a PRAM or methods of simply reducing a contact region between a phase-change material and an electrode material, which have been proposed so far in most preceding research, very complicated processes should be added. This increases production costs and a deviation in device characteristics and hinders a process of compatibly integrating a common CMOS transistor of a reconfigurable LSI or a system LSI with its related devices. As a result, in order to satisfy the first condition, it is most desirable to provide a device with the simplest structure that contributes effectually toward reducing an operating current and increasing operating reliability. Accordingly, a nonvolatile programmable switch device needs to have a self-heating channel region formed of a phase-change material without using a contact region between an operating region formed of a phase-change material and an electrode material.
Second, for a nonvolatile programmable switch device using a PRAM, it is difficult to reduce an operating current and simultaneously, increase operating reliability. This is largely due to the fact that the PRAM includes two terminals. That is, when a conventional transistor is used as a switch, the amount of current flowing between a source and a drain may be controlled by adjusting a voltage signal applied to a gate terminal. However, since a two-terminal PRAM uses the same terminal to write predetermined data and read stored data, when the PRAM is used as a nonvolatile programmable switch device, it should still use the same terminals even when the two terminals are connected to other devices constituting a reconfigurable LSI or a system LSI. This two-terminal device structure cannot ensure low power consumption and high operating reliability for a nonvolatile programmable switch device used in a reconfigurable LSI or a system LSI. Of course, it would be possible to partially solve the technical issues by specially improving a phase-change material or an operation mode of a switch device. However, this increases the burden of technical developments because these techniques are not yet developed. Even if the techniques are developed, it is fundamentally difficult to completely solve the technical issues related to power consumption and operating reliability. In conclusion, it is necessary to introduce a four-terminal nonvolatile programmable switch device capable of separating a write operation from a read operation instead of a conventional two-terminal PRAM.